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1 features ? next generation equivalent of atf20v8b (atf20v8bq, atf22v10bqc) complimentary easy-to-use atmel-wincupl design software ?z? zero power compared to ?l? low power edge-sensing zero standby power (10 a typical) (cqz) pin-controlled zero standby power (10 a typical) option (c, cq) user-controlled power-down pin (c, cq) high-speed electrically erasable programmable logic devices ? 5 ns maximum pin-to-pin delay (c) cmos and ttl compatible inputs and outputs ? pin-keeper feature holds inputs and i/os to previous logic states ? pci compliant high-reliability ee process ? 20 year data retention ? 100 erase/write cycles ? 2,000v esd protection ? 200 ma latch-up immunity commercial and industrial temperature ranges at20v8c family high- performance ee pld atf20v8c atf20v8cq atf20v8cqz rev. 0408h?04/01 pin configurations all pinouts top view pin name function clk clock in logic inputs i/o bi-directional buffers oe output enable nc no internal connection vcc +5v supply pd power-down tssop 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 clk/in in in in in in in in in in in gnd vcc in i/o i/o i/o i/o i/o i/o i/o i/o in oe/in (1) pd/ plcc 5 6 7 8 9 10 11 25 24 23 22 21 20 19 (1) pd/in in in nc in in in i/o i/o i/o nc i/o i/o i/o 4 3 2 1 28 27 26 12 13 14 15 16 17 18 in in gnd nc oe/in in i/o in in clk/in nc vcc in i/o dip/soic 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 clk/in in in (1) pd/in in in in in in in in gnd vcc in i/o i/o i/o i/o i/o i/o i/o i/o in oe/in note: 1. pd on c and cq only.
2 atf20v8c family 0408h ? 04/01 block diagram description the atf20v8c is a high-performance cmos (electrically erasable) programmable logic device (pld) that utilizes atmel ? s proven electrically erasable technology. speeds down to 5 ns and power dissipation as low as 10 a are offered. all speed ranges are specified over the full 5v 10% range for industrial temperature ranges, and 5v 5% for commercial ranges. the atf20v8c(q) provides a high-speed cmos pld solution with maximum pin-to-pin delay of 5 ns. the atf20v8c(q) also has a user-controlled power-down fea- ture, offering ? zero ? standby power (10 a typical). the user-controlled power-down feature allows the user to manage total system power to meet specific application requirements and enhance reliability without sacrificing speed. the atf20v8cqz provides the zero power cmos pld solution, with ? zero ? standby power (10 a typical). the device powers down automatically through atmel ? s pat- ented input transition detection (itd) circuitry to the ? zero ? standby power mode when all inputs are idle. pin ? keeper ? circuits on input and output pins reduce static power consumed by pull-ups. the atf20v8c(q)(z) is the industry-standard 20v8 archi- tecture. eight outputs are each allocated eight product terms. three different modes of operation, configured auto- matically with software, allow highly complex logic functions to be realized. power-up reset the registers in the atf20v8cs are designed to reset dur- ing power-up. at a point delayed slightly from v cc crossing v rst , all registers will be reset to the low state. as a result, the registered output state will always be high on power-up. this feature is critical for state machine initialization. how- ever, due to the asynchronous nature of reset and the uncertainty of how v cc actually rises in the system, the fol- lowing conditions are required: 1. the v cc rise must be monotonic, 2. after reset occurs, all input and feedback setup times must be met before driving the clock pin high, and 3. the clock must remain stable during t pr . preload of registered outputs the atf20v8c registers are provided with circuitry to allow loading of each register with either a high or a low. this feature will simplify testing since any state can be forced into the registers to control test sequencing. a jedec file with preload is generated when a source file with vectors is compiled. once downloaded, the jedec file preload sequence will be done automatically by most of the approved programmers after the programming. electronic signature word there are 64 bits of programmable memory that are always available to the user, even if the device is secured. these bits can be used for user-specific data.
3 atf20v8c family 0408h ? 04/01 security fuse usage a single fuse is provided to prevent unauthorized copying of the atf20v8c ? s fuse patterns. once programmed, fuse verify and preload are inhibited. however, the 64-bit user signature remains accessible. the security fuse should be programmed last, as its effect is immediate. programming/erasing programming/erasing is performed using standard pld programmers. for further information, see the configurable logic data book section titled, ? cmos pld programming hardware and software support. ? input and i/o pull-ups all atf20v8c family members have internal input and i/o ? pin-keeper ? circuits. therefore, whenever inputs or i/os are not being driven externally, they will maintain their last driven state. this ensures that all logic array inputs and device outputs are at known states. these are relatively weak active circuits that can be easily overridden by ttl- compatible drivers (see input and i/o diagrams below). input diagram i/o diagram 100k v cc esd protection circuit input 100k v cc v cc data oe i/o input
4 atf20v8c family 0408h ? 04/01 functional logic diagram description the logic option and functional diagrams describe the atf20v8c architecture. eight configurable macrocells can be configured as a registered output, combinatorial i/o, combinatorial output or dedicated input. the atf20v8c ? s macrocell can be configured in one of three different modes. each mode makes the atf20v8cs look like a different device. the atf20v8cs can be a reg- istered output, combinatorial i/o, combinatorial output or dedicated input. most pld compilers can choose the right mode automatically. the user can also force the selection by supplying the compiler with a mode selection. the deter- mining factors would be the usage of register versus combinatorial outputs and dedicated outputs versus output with output enable control. the atf20v8cs have a user-controlled power-down pin, which, when active, allows the user to place the device into a ? zero ? standby power-down mode. the device can also operate at high speed. maximum pin-to-pin delays of 5 ns are offered. static power loss due to pull-up resistors is eliminated by using input and output pin ? keeper ? circuits that hold pins to their previous logic levels when idle. the universal architecture of the atf20v8cs can be pro- grammed to emulate many 24-pin pal devices. the user can download the subset device jedec programming file to the pld programmer and the atf20v8cs can be config- ured to act like the chosen device. unused product terms are automatically disabled by the compiler to decrease power consumption. a security fuse, when programmed, protects the contents the atf20v8cs. eight bytes (64 fuses) of user signature are accessible to the user for purposes such as storing project name, part number, revision or date. the user signature is accessible regardless of the state of the security fuse. note: 1. only applicable for version 3.4 or lower. compiler mode selection registered complex simple auto select abel, atmel-abel p20v8r p20v8c p20v8 p20v8 cupl g20v8ms g20v8ma g20v8 g20v8a log/ic gal20v8_r (1) gal20v8_c7 (1) gal20v8_c8 (1) gal20v8 orcad-pld ? registered ?? complex ?? simple ? gal20v8 pldesigner p20v8 p20v8 p20v8 p20v8 tango-pld g20v8 g20v8 g20v8 g20v8
5 atf20v8c family 0408h ? 04/01 registered mode pal device emulation/pal replacement the registered mode is used if one or more registers are required. each macrocell can be configured as either a reg- istered or combinatorial output or i/o, or as an input. for a registered output or i/o, the output is enabled by the oe pin, and the register is clocked by the clk pin. eight prod- uct terms are allocated to the sum term. for a combinato- rial output or i/o, the output enable is controlled by a product term, and seven product terms are allocated to the sum term. when the macrocell is configured as an input, the output enable is permanently disabled. any register usage will make the compiler select this mode. the following registered devices can be emulated using this mode: 20r8 20rp8 20r6 20rp6 20r4 20rp4 registered mode operation
6 atf20v8c family 0408h ? 04/01 registered mode logic diagram
7 atf20v8c family 0408h ? 04/01 complex mode pal device emulation/pal replacement in the complex mode, combinatorial output and i/o func- tions are possible. pins 1 and 11 are regular inputs to the array. pins 13 through 18 have pin feedback paths back to the and-array, which makes full i/o capability possible. pins 12 and 19 (outermost macrocells) are outputs only. they do not have input capability. in this mode, each macrocell has seven product terms going to the sum term and one product term enabling the output. combinatorial applications with an oe requirement will make the compiler select this mode. the following devices can be emulated using this mode: 20l8 20h8 20p8 complex mode operation simple mode pal device emulation/pal replacement in the simple mode, eight product terms are allocated to the sum term. pins 15 and 16 (center macrocells) are per- manently configured as combinatorial outputs. other mac- rocells can be either inputs or combinatorial outputs with pin feedback to the and-array. pins 1 and 11 are regular inputs. the compiler selects this mode when all outputs are combi- natorial without oe control. the following simple pals can be emulated using this mode: 14l8 14h8 14p8 16l6 18h6 16p6 18l4 18h4 18p4 20l2 20h2 20p2 simple mode option
8 atf20v8c family 0408h ? 04/01 complex mode logic diagram
9 atf20v8c family 0408h ? 04/01 simple mode logic diagram
10 atf20v8c family 0408h ? 04/01 absolute maximum ratings* temperature under bias ................................ -55 c to +125 c *notice: stresses beyond those listed under ? absolute maximum ratings ? may cause permanent dam- age to the device. this is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. note: 1. minimum voltage is -0.6v dc, which may under- shoot to -2.0v for pulses of less than 20 ns. maxi- mum output pin voltage is v cc + 0.75v dc, which may overshoot to 7.0v for pulses of less than 20 ns. storage temperature ..................................... -65 c to +150 c voltage on any pin with respect to ground .........................................-2.0v to +7.0v (1) voltage on input pins with respect to ground during programming .....................................-2.0v to +14.0v (1) programming voltage with respect to ground .......................................-2.0v to +14.0v (1) dc and ac operating conditions commercial industrial operating temperature (ambient) 0 c - 70 c-40 c - 85 c v cc power supply 5v = 5% 5v = 10% parameter description typ max units t pr power-up reset time 600 1,000 ns v rst power-up reset voltage 3.8 4.5 v
11 atf20v8c family 0408h ? 04/01 input test waveforms and measurement levels t r , t f < 1.5 ns (10% to 90%) output test loads commercial note: 1. typical values for nominal supply voltage. this parameter is only sampled and is not 100% tested. pin capacitance f = 1 mhz, t = 25 c (1) typ max units conditions c in 58 pf v in = 0v c out 68 pf v out = 0v
12 atf20v8c 0408h ? 04/01 notes: 1. not more than one output at a time should be shorted. duration of short circuit test should not exceed 30 sec. 2. all values are at v cc and t a =25 c. 3. shaded area indicates preliminary data. atf20v8c dc characteristics v cc = 5.0v and t a = 25 c symbol parameter condition min typ max units i il input or i/o low leakage current 0 = v in = v il (max) -35 -100 a i ih input or i/o high leakage current 3.5 = v in = v cc 10 a i cc power supply current, standby v cc = max, v in = max, outputs open c-5 com. 60 90 ma c-5 ind. 60 100 ma c-7 com. 60 90 ma c-7 ind. 60 100 ma c-10 com. 60 80 ma c-10 ind. 60 90 ma c-15 com. 60 80 ma c-15 ind. 60 90 ma i cc2 clocked power supply current v cc = max, outputs open, f = 15 mhz c-5 com. 70 110 ma c-5 ind. 70 125 ma c-7 com. 70 110 ma c-7 ind. 70 125 ma c-10 com. 60 90 ma c-10 ind. 60 105 ma c-15 com. 60 90 ma c-15 ind. 60 105 ma ios (1) output short circuit current v out = 0.5v -130 ma v il input low voltage -0.5 0.8 v v ih input high voltage 2.0 v cc + 0.75 v v ol output low voltage v in = v ih or v il , v cc = min i ol = 24 ma com., ind. 0.5 v i ol = 16 ma 0.5 v v oh output high voltage v in = v ih or v il , v cc = min i oh = -4.0 ma 2.4 v
13 atf20v8c 0408h ? 04/01 ac waveforms (1) note: 1. timing measurement reference is 1.5v. input ac driving levels are 0.0v and 3.0v, unless otherwise specified. notes: 1. see ordering information for valid part numbers and speed grades. 2. shaded area indicates preliminary data. atf20v8c family ac characteristics (1) symbol parameter c-5 c-7 c-10 c-15 units min max min max min max min max t pd input or feedback to non-registered output 8 outputs switching 3 5 3 7.5 3 10 3 15 ns 1 output switching 7 10 ns t cf clock to feedback 3 3 68ns t co clock to output 2 4 2 5 2 7 2 10 ns t s input or feedback setup time 3 5 7.5 12 ns t h hold time 0 0 0 0ns t p clock period 6 8 12 16 ns t w clock width 3 4 6 8ns f max external feedback 1/(t s + t co ) 143 100 68 45 mhz internal feedback 1/(t s + t cf ) 167 125 74 50 mhz no feedback 1/(t p ) 7 167 125 83 62 mhz t ea input to output enable ? product term 3 6 3 9 3 10 3 15 ns t er input to output disable ? product term 2 6 2 9 2 10 2 15 ns t pzx oe pin to output enable 2 5 2 6 2 10 2 15 ns t pxz oe pin to output disable 1.5 5 1.5 6 1.5 10 1.5 15 ns
14 atf20v8c 0408h ? 04/01 atf20v8c characteristic curves stand-by i cc vs. supply voltage (t a = 25 c) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 4.5 4.8 5.0 5.3 5.5 supply voltage (v) i cc (a) tbd supply current vs. input frequency (v cc = 5.0v, t a = 25 c) 0.000 20.000 40.000 60.000 80.000 100.000 120.000 140.000 0.0 0.5 2.5 5.0 7.5 10.0 25.0 37.5 50.0 frequency (mhz) i cc (ma) tbd output source current vs. supply voltage (v oh = 2.4v) -50 -40 -30 -20 -10 0 4.0 4.5 5.0 5.5 6.0 supply voltage (v) i oh (ma) tbd output sink current vs. supply voltage (v ol = 0.5v) 0 0 0 1 1 1 4.04.55.05.56.0 supply voltage (v) iol (ma) tbd normalized i cc vs. temp 0.4 0.6 0.8 1.0 1.2 1.4 -40.0 0.0 25.0 75.0 temperature (c) normalized icc tbd supply current vs. input frequency (v cc = 5.0v, t a = 25 c) 0.000 0.200 0.400 0.600 0.800 1.000 0.0 0.5 2.5 5.0 7.5 10.0 25.0 37.5 50.0 frequency (mhz) i cc (ma) tbd output source current vs. output voltage (v cc = 5.0v, t a = 25 c) -90.0 -80.0 -70.0 -60.0 -50.0 -40.0 -30.0 -20.0 -10.0 0.0 0.00 0.50 1.00 1.50 2.00 2.50 3.00 3.50 4.00 4.50 5.00 v oh (v) i oh (ma) tbd output sink current vs. output voltage (v cc = 5.0v, t a = 25 c) 0.0 20.0 40.0 60.0 80.0 100.0 120.0 140.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 supply voltage (v) i ol (ma) tbd
15 atf20v8c 0408h ? 04/01 atf20v8c characteristic curves (continued) input clamp current vs. input voltage (v cc = 5.0v, t a = 35 c) -120 -100 -80 -60 -40 -20 0 0.0 -0.2 -0.4 -0.6 -0.8 -1.0 input voltage (v) input curren t (ma) tbd normalized t pd vs. vcc 0.8 0.9 1.0 1.1 1.2 4.5 4.8 5.0 5.3 5.5 supply voltage (v) normalized t pd tbd normalized t co vs. vcc 0.8 0.9 1.0 1.1 1.2 1.3 4.5 4.8 5.0 5.3 5.5 supply voltage (v) normalized t co tbd normalized t su vs. vcc 0.8 0.9 1.0 1.1 1.2 4.5 4.8 5.0 5.3 5.5 supply voltage (v) normalized t su tbd input current vs. input voltage (v cc = 5.0v, t a = 25 c) 0 0 0 1 1 1 0.0 1.0 2.0 3.0 4.0 5.0 6.0 input voltage (v) input current (ua) tbd normalized t pd vs. temp 0.8 0.9 1.0 1.1 -40.0 0.0 25.0 75.0 temperature (c) normalized t pd tbd normalized t co vs. temp 0.8 0.9 1.0 1.1 -40.0 0.0 25.0 75.0 temperature (v) normalized t co tbd normalized t su vs. temp 0.8 0.9 1.0 1.1 1.2 -40.0 0.0 25.0 75.0 temperature (c) normalized t co tbd
16 atf20v8c 0408h ? 04/01 atf20v8c characteristic curves (continued) delta t pd vs. output loading -2 0 2 4 6 8 0 50 100 150 200 250 300 output loading (pf) delta t pd (ns) tbd delta t pd vs. # of output switching -0.5 -0.4 -0.3 -0.2 -0.1 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 number of outputs switching delta t pd (ns) tbd delta t co vs. output loading 0.00 0.10 0.20 0.30 0.40 0.50 0.60 0.70 0.80 0.90 1.00 50 100 150 200 250 300 number of outputs loading delta t co (ns) tbd delta t co vs. # of output switching 0.0 0.2 0.4 0.6 0.8 1.0 1.02.03.04.05.06.07.08.09.010.0 number of outputs switching delta t co (ns) tbd
17 atf20v8cq 0408h ? 04/01 notes: 1. not more than one output at a time should be shorted. duration of short circuit test should not exceed 30 sec. 2. shaded areas indicate preliminary data. atf20v8cq dc characteristics v cc = 5.0v and t a = 25 c symbol parameter condition min typ max units i il input or i/o low leakage current 0 = v in = v il (max) -35 -100 a i ih input or i/o high leakage current 3.5 = v in = v cc 10 a i cc power supply current, standby v cc = max, v in = max, outputs open cq-10, -15 com. 10 25 a i cc2 clocked power supply current v cc = max, outputs open, f = 15 mhz cq-10, 15 com. 40 55 ma ios (1) output short circuit current v out = 0.5v -130 ma v il input low voltage -0.5 0.8 v v ih input high voltage 2.0 v cc + 0.75 v v ol output low voltage v in = v ih or v il , v cc = min i ol = 24 ma com., ind. 0.5 v i ol = 16 ma 0.5 v v oh output high voltage v in = v ih or v il , v cc = min i oh = -4.0 ma 2.4 v
18 atf20v8cq 0408h ? 04/01 notes: 1. see ordering information for valid part numbers and speed grades. 2. all values are at v cc =5v and t a =25 c. 3. shaded areas indicate preliminary data. atf20v8cq ac characteristics (1) symbol parameter cq-10 units min max t pd input or feedback to non-registered output 8 outputs switching 3 10 ns 1 output switching ns t cf clock to feedback 6ns t co clock to output 2 7ns t s input or feedback setup time 7.5 ns t h hold time 0 ns t p clock period 12 ns t w clock width 6 ns f max external feedback 1/(t s + t co ) 68 mhz internal feedback 1/(t s + t cf ) 74 mhz no feedback 1/(t p ) 83 mhz t ea input to output enable ? product term 3 10 ns t er input to output disable ? product term 2 10 ns t pzx oe pin to output enable 2 10 ns t pxz oe pin to output disable 1.5 10 ns
19 atf20v8cq 0408h ? 04/01 atf20v8cq characteristic curves stand-by i cc vs. supply voltage (t a = 25 c) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 4.5 4.8 5.0 5.3 5.5 supply voltage (v) i cc (a) tbd supply current vs. input frequency (v cc = 5.0v, t a = 25 c) 0.000 20.000 40.000 60.000 80.000 100.000 120.000 140.000 0.0 0.5 2.5 5.0 7.5 10.0 25.0 37.5 50.0 frequency (mhz) i cc (ma) tbd output source current vs. supply voltage (v oh = 2.4v) -50 -40 -30 -20 -10 0 4.04.55.05.56.0 supply voltage (v) i oh (ma) tbd output sink current vs. supply voltage (v ol = 0.5v) 0 0 0 1 1 1 4.04.55.05.56.0 supply voltage (v) iol (ma) tbd normalized i cc vs. temp 0.4 0.6 0.8 1.0 1.2 1.4 -40.0 0.0 25.0 75.0 temperature (c) normalized icc tbd supply current vs. input frequency (v cc = 5.0v, t a = 25 c) 0.000 0.200 0.400 0.600 0.800 1.000 0.0 0.5 2.5 5.0 7.5 10.0 25.0 37.5 50.0 frequency (mhz) i cc (ma) tbd output source current vs. output voltage (v cc = 5.0v, t a = 25 c) -90.0 -80.0 -70.0 -60.0 -50.0 -40.0 -30.0 -20.0 -10.0 0.0 0.00 0.50 1.00 1.50 2.00 2.50 3.00 3.50 4.00 4.50 5.00 v oh (v) i oh (ma) tbd output sink current vs. output voltage (v cc = 5.0v, t a = 25 c) 0.0 20.0 40.0 60.0 80.0 100.0 120.0 140.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 supply voltage (v) i ol (ma) tbd
20 atf20v8cq 0408h ? 04/01 atf20v8cq characteristic curves (continued) input clamp current vs. input voltage (v cc = 5.0v, t a = 35 c) -120 -100 -80 -60 -40 -20 0 0.0 -0.2 -0.4 -0.6 -0.8 -1.0 input voltage (v) input current (ma) tbd normalized t pd vs. vcc 0.8 0.9 1.0 1.1 1.2 4.5 4.8 5.0 5.3 5.5 supply voltage (v) normalized t pd tbd normalized t co vs. vcc 0.8 0.9 1.0 1.1 1.2 1.3 4.5 4.8 5.0 5.3 5.5 supply voltage (v) normalized t co tbd normalized t su vs. vcc 0.8 0.9 1.0 1.1 1.2 4.5 4.8 5.0 5.3 5.5 supply voltage (v) normalized t su tbd input current vs. input voltage (v cc = 5.0v, t a = 25 c) 0 0 0 1 1 1 0.0 1.0 2.0 3.0 4.0 5.0 6.0 input voltage (v) input current (ua) tbd normalized t pd vs. temp 0.8 0.9 1.0 1.1 -40.0 0.0 25.0 75.0 temperature (c) normalized t pd tbd normalized t co vs. temp 0.8 0.9 1.0 1.1 -40.0 0.0 25.0 75.0 temperature (v) normalized t co tbd normalized t su vs. temp 0.8 0.9 1.0 1.1 1.2 -40.0 0.0 25.0 75.0 temperature (c) normalized t co tbd
21 atf20v8cq 0408h ? 04/01 atf20v8cq characteristic curves (continued) delta t pd vs. output loading -2 0 2 4 6 8 0 50 100 150 200 250 300 output loading (pf) delta t pd (ns) tbd delta t pd vs. # of output switching -0.5 -0.4 -0.3 -0.2 -0.1 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 number of outputs switching delta t pd (ns) tbd delta t co vs. output loading 0.00 0.10 0.20 0.30 0.40 0.50 0.60 0.70 0.80 0.90 1.00 50 100 150 200 250 300 number of outputs loading delta t co (ns) tbd delta t co vs. # of output switching 0.0 0.2 0.4 0.6 0.8 1.0 1.02.03.04.05.06.07.08.09.010.0 number of outputs switching delta t co (ns) tbd
22 atf20v8cqz 0408h ? 04/01 notes: 1. not more than one output at a time should be shorted. duration of short circuit test should not exceed 30 sec. 2. all values are at v cc =5v and t a =25 c. 3. shaded areas indicate preliminary data. atf20v8cqz dc characteristics v cc = 5.0v and t a = 25 c symbol parameter condition min typ max units i il input or i/o low leakage current 0 = v in = v il (max) -35 -100 a i ih input or i/o high leakage current 3.5 = v in = v cc 10 a i cc power supply current, standby v cc = max, v in = max, outputs open cqz-15 com. 10 25 a ind. 10 50 a i cc2 clocked power supply current v cc = max, outputs open, f = 15 mhz cqz-15 com. 20 35 ma ind. 20 40 ma ios (1) output short circuit current v out = 0.5v -130 ma v il input low voltage -0.5 0.8 v v ih input high voltage 2.0 v cc + 0.75 v v ol output low voltage v in = v ih or v il , v cc = min i ol = 24 ma com., ind. 0.5 v i ol = 16 ma 0.5 v v oh output high voltage v in = v ih or v il , v cc = min i oh = -4.0 ma 2.4 v
23 atf20v8cqz 0408h ? 04/01 notes: 1. see ordering information for valid part numbers and speed grades. 2. shaded areas indicate preliminary data. atf20v8cqz ac characteristics (1) symbol parameter cqz-15 units min max t pd input or feedback to non-registered output 8 outputs switching 3 15 ns 1 output switching 10 ns t cf clock to feedback 8ns t co clock to output 2 10 ns t s input or feedback setup time 12 ns t h hold time 0 ns t p clock period 16 ns t w clock width 8 ns f max external feedback 1/(t s + t co ) 45 mhz internal feedback 1/(t s + t cf ) 50 mhz no feedback 1/(t p ) 62 mhz t ea input to output enable ? product term 3 15 ns t er input to output disable ? product term 2 15 ns t pzx oe pin to output enable 2 15 ns t pxz oe pin to output disable 1.5 15 ns
24 atf20v8cqz 0408h ? 04/01 atf20v8cqz characteristic curves stand-by i cc vs. supply voltage (t a = 25 c) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 4.5 4.8 5.0 5.3 5.5 supply voltage (v) i cc (a) tbd supply current vs. input frequency (v cc = 5.0v, t a = 25 c) 0.000 20.000 40.000 60.000 80.000 100.000 120.000 140.000 0.0 0.5 2.5 5.0 7.5 10.0 25.0 37.5 50.0 frequency (mhz) i cc (ma) tbd output source current vs. supply voltage (v oh = 2.4v) -50 -40 -30 -20 -10 0 4.0 4.5 5.0 5.5 6.0 supply voltage (v) i oh (ma) tbd output sink current vs. supply voltage (v ol = 0.5v) 0 0 0 1 1 1 4.04.55.05.56.0 supply voltage (v) iol (ma) tbd normalized i cc vs. temp 0.4 0.6 0.8 1.0 1.2 1.4 -40.0 0.0 25.0 75.0 temperature (c) normalized icc tbd supply current vs. input frequency (v cc = 5.0v, t a = 25 c) 0.000 0.200 0.400 0.600 0.800 1.000 0.0 0.5 2.5 5.0 7.5 10.0 25.0 37.5 50.0 frequency (mhz) i cc (ma) tbd output source current vs. output voltage (v cc = 5.0v, t a = 25 c) -90.0 -80.0 -70.0 -60.0 -50.0 -40.0 -30.0 -20.0 -10.0 0.0 0.00 0.50 1.00 1.50 2.00 2.50 3.00 3.50 4.00 4.50 5.00 v oh (v) i oh (ma) tbd output sink current vs. output voltage (v cc = 5.0v, t a = 25 c) 0.0 20.0 40.0 60.0 80.0 100.0 120.0 140.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 supply voltage (v) i ol (ma) tbd
25 atf20v8cqz 0408h ? 04/01 atf20v8cqz-15 characteristic curves (continued) input clamp current vs. input voltage (v cc = 5.0v, t a = 35 c) -120 -100 -80 -60 -40 -20 0 0.0 -0.2 -0.4 -0.6 -0.8 -1.0 input voltage (v) input current (ma) tbd normalized t pd vs. vcc 0.8 0.9 1.0 1.1 1.2 4.5 4.8 5.0 5.3 5.5 supply voltage (v) normalized t pd tbd normalized t co vs. vcc 0.8 0.9 1.0 1.1 1.2 1.3 4.5 4.8 5.0 5.3 5.5 supply voltage (v) normalized t co tbd normalized t su vs. vcc 0.8 0.9 1.0 1.1 1.2 4.5 4.8 5.0 5.3 5.5 supply voltage (v) normalized t su tbd input current vs. input voltage (v cc = 5.0v, t a = 25 c) 0 0 0 1 1 1 0.0 1.0 2.0 3.0 4.0 5.0 6.0 input voltage (v) input current (ua) tbd normalized t pd vs. temp 0.8 0.9 1.0 1.1 -40.0 0.0 25.0 75.0 temperature (c) normalized t pd tbd normalized t co vs. temp 0.8 0.9 1.0 1.1 -40.0 0.0 25.0 75.0 temperature (v) normalized t co tbd normalized t su vs. temp 0.8 0.9 1.0 1.1 1.2 -40.0 0.0 25.0 75.0 temperature (c) normalized t co tbd
26 atf20v8cqz 0408h ? 04/01 atf20v8cqz-15 characteristic curves (continued) delta t pd vs. output loading -2 0 2 4 6 8 0 50 100 150 200 250 300 output loading (pf) delta t pd (ns) tbd delta t pd vs. # of output switching -0.5 -0.4 -0.3 -0.2 -0.1 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 number of outputs switching delta t pd (ns) tbd delta t co vs. output loading 0.00 0.10 0.20 0.30 0.40 0.50 0.60 0.70 0.80 0.90 1.00 50 100 150 200 250 300 number of outputs loading delta t co (ns) tbd delta t co vs. # of output switching 0.0 0.2 0.4 0.6 0.8 1.0 1.02.03.04.05.06.07.08.09.010.0 number of outputs switching delta t co (ns) tbd
27 atf20v8c family 0408h ? 04/01 note: 1. shaded areas indicate preliminary data. atf20v8c family ordering information t pd (ns) t s (ns) t co (ns) ordering code package operation range 5 3 4 atf20v8c-5jc 28j commercial (0 c to 70 c) 7.5 3.5 4.5 atf20v8c-7jc atf20v8c-7pc atf20v8c-7sc atf20v8c-7xc 28j 24p3 24s 24x commercial (0 c to 70 c) atf20v8c-7ji atf20v8c-7pi atf20v8c-7si atf20v8c-7xi 28j 24p3 24s 24x industrial (-40 c to 85 c) 10 4.5 6.5 atf20v8c-10jc atf20v8c-10pc atf20v8c-10sc atf20v8c-10xc 28j 24p3 24s 24x commercial (0 c to 70 c) atf20v8c-10ji atf20v8c-10pi atf20v8c-10si atf20v8c-10xi 28j 24p3 24s 24x industrial (-40 c to 85 c) 15 10 8 atf20v8c-15jc ATF20V8C-15PC atf20v8c-15sc atf20v8c-15xc 28j 24p3 24s 24x commercial (0 c to 70 c) atf20v8c-15ji atf20v8c-15pi atf20v8c-15si atf20v8c-15xi 28j 24p3 24s 24x industrial (-40 c to 85 c) 10 7.5 7 atf20v8cq-10jc atf20v8cq-10pc atf20v8cq-10sc atf20v8cq-10xc 28j 24p3 24s 24x commercial (0 c to 70 c) atf20v8cq-10ji atf20v8cq-10pi atf20v8cq-10si atf20v8cq-10xi 28j 24p3 24s 24x industrial (-40 c to 85 c) 15 10 8 atf20v8cqz-15jc atf20v8cqz-15pc atf20v8cqz-15sc atf20v8cqz-15xc 28j 24p3 24s 24x commercial (0 c to 70 c) atf20v8cqz-15ji atf20v8cqz-15pi atf20v8cqz-15si atf20v8cqz-15xi 28j 24p3 24s 24x industrial (-40 c to 85 c)
28 atf20v8c family 0408h ? 04/01 using ? c ? product for industrial to use commercial product for industrial temperature ranges, down-grade one speed grade from the ? i ? to the ? c ? device (7 ns ? c ? = 10 ns ? i ? ) and de-rate power by 30%. package type 28j 28-lead, plastic j-leaded chip carrier (plcc) 24p3 24-lead, 0.300" wide, plastic dual inline package (pdip) 24s 24-lead, 0.300" wide, plastic gull wing small outline (soic) 24x 24-lead, 4.4 mm wide, plastic thin shrink small outline (tssop)
29 packaging information atf20v8c family 0408h ? 04/01 .045(1.14) x 45 pin no. 1 identify .032(.813) .026(.660) .050(1.27) typ .300(7.62) ref sq .045(1.14) x 30 - 45 .022(.559) x 45 max (3x) .012(.305) .008(.203) .021(.533) .013(.330) .430(10.9) .390(9.91) sq .043(1.09) .020(.508) .120(3.05) .090(2.29) .180(4.57) .165(4.19) .456(11.6) .450(11.4) .495(12.6) .485(12.3) sq sq 1.27(32.3) 1.25(31.7) pin 1 .266(6.76) .250(6.35) .090(2.29) max .005(.127) min .070(1.78) .020(.508) .023(.584) .014(.356) .065(1.65) .040(1.02) .325(8.26) .300(7.62) 0 15 ref .400(10.2) max .012(.305) .008(.203) .110(2.79) .090(2.29) .151(3.84) .125(3.18) seating plane .200(5.06) max 1.100(27.94) ref .020(.508) .013(.330) .299(7.60) .291(7.39) .420(10.7) .393(9.98) .105(2.67) .092(2.34) .050(1.27) bsc .616(15.6) .598(15.2) .012(.305) .003(.076) .013(.330) .009(.229) .050(1.27) .015(.381) 8 0 ref pin 1 id 28j , 28-lead, plastic j-leaded chip carrier (plcc) dimensions in inches and (millimeters) jedec standard ms-018 ab 24p3 , 24-lead, 0.300" wide, plastic dual inline package (pdip) dimensions in inches and (millimeters) jedec standard ms-001 af 24s , 24-lead, 0.300" wide, plastic gull wing small outline (soic) dimensions in inches and (millimeters) 24x , 24-lead, 4.4 mm wide, plastic thin shrink small outline (tssop) dimensions in millimeters and (inches)
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